M.Sc. Tezi Görüntüleme

      Development of high performance computer systems depends on increasing complexity of integrated modules. This complexity demands new and improved computer aided design tools. Some of the problems are printed circuit board size reduction and optimal component placement. Wiring the components placed on a board in a short time brings up another problem. Given the time constraint, it is important to implement connections without extra layers and not inspecting all possible states.

      In this study, given the initial placement of the components, structural graphs of the circuit are formed to evaluate the minimum number of layers via heuristic functions. Another solution to implement wiring problem via combinational approach is also suggested.

      Keywords: Topology, Graph, Wiring, Board, Heuristic.